1. Field of the Invention
The present invention relates to a semiconductor unit having a plurality of semiconductor chips sandwiched between upper and lower conductive plates, and a semiconductor device using this semiconductor unit.
2. Related Art
A semiconductor device having a structure using Si-IGBT (Insulated Gate Bipolar Transistor produced by use of an Si semiconductor substrate) and SiC-Di (Diode produced by use of an SiC semiconductor substrate) as FWD (Free Wheeling Diode) has been developed recently as a semiconductor module for forming an inverter device or the like. This SiC-Di is a Schottky barrier diode which can exhibit a higher withstand voltage than that of a Schottky barrier diode produced by use of an Si semiconductor substrate and which can exhibit a lower switching loss than that of a pn diode. Incidentally, Si is silicon and SiC is silicon carbide.
FIGS. 5(a) and 5(b) are configuration views of a semiconductor device according to the background art, in which FIG. 5(a) is a view of arrangement in a casing and FIG. 5(b) is a sectional view of important part. This semiconductor device 500 is a semiconductor module formed from two Si-IGBT chips 66 and eight SiC-Di chips (SiC-diode chips) 68 which are free wheeling diodes. This semiconductor device 500 can form one upper or lower arm in an inverter.
In the semiconductor device 500, a conductive pattern-including insulating substrate 62 is joined onto a copper base plate 61, and a first conductive pattern 63, a second conductive pattern 64 and a third conductive pattern 65 are formed on the conductive pattern-including insulating substrate 62. The first conductive pattern 63 and collector electrodes 67 of the Si-IGBT chips 66, the second conductive
pattern 64 and cathode electrodes 69 of the SiC-Di chips 68 are joined respectively by solder or Ag paste not shown. Emitter electrodes 70 of the Si-IGBT chips 66 and anode electrodes 71 of the SiC-Di chips 68 are connected to the second conductive pattern 64 by aluminum wires 72. Gate pads 73 of the Si-IGBT chips 66 are connected to the third conductive pattern 65 by aluminum wires 74.
A collector terminal C, an emitter terminal E and a gate terminal G are joined to the first conductive pattern 63, the second conductive pattern 64 and the third conductive pattern 65 respectively.
A casing 75 in which the respective chips are housed is joined to the copper base plate 61 which is a heat radiator. For example, the casing 75 is filled with gel not shown while the respective terminals (the collector terminal C, the emitter terminal E and the gate terminal G) are exposed on this casing 75.
In FIGS. 5(a) and 5(b), two Si-IGBT chips 66 and eight SiC-Di chips 68 are housed in the casing 75. Because crystallinity of the SiC semiconductor substrate is not always good, the size of one SiC-Di chip 68 is limited to about several mm square. For this reason, the semiconductor device 500 requires, for example, four SiC-Di chips 68 for one Si-IGBT chip 66. If occasion demands, a larger number of SiC-Di chips 68 are required.
In Japanese Patent No. 4254527 (also referred to herein as “Patent Literature 1”), there has been disclosed the fact that different kinds of elements connected in parallel are connected by conductive plates and sealed with a resin to form a semiconductor unit (referred to as unit package), and a plurality of such semiconductor units (unit packages) are used for forming a semiconductor module.
As described above, because an SiC semiconductor substrate includes a large number of crystal defects when it has a large area, the size (about several mm square as described above) of an SiC-Di chip 68 using the SiC semiconductor substrate is smaller than the size of a Di chip using Si. In a semiconductor module (semiconductor device 500) using SiC-Di chips 68 as shown in FIG. 5, it is therefore necessary to use a large number of SiC-Di chips 68 connected in parallel.
For this reason, in the semiconductor module (semiconductor device 500), the number of wires 72 used for connection increases, so that the number of processes increases and the cost increases. In the semiconductor module (semiconductor device 500), parallel operation of chips varies according to variations in length of the wires 72 so that some chip suffering from current concentration may be broken down to reduce reliability of the semiconductor module (semiconductor device 500). In addition, because the semiconductor module (semiconductor device 500) has a single-sided cooling structure, thermal resistance is high.
In Patent Literature 1, there has been not described the fact that one and the same kind of elements (e.g., SiC-Di chips or the like) are connected in parallel to form a semiconductor unit (unit package), and such semiconductor units are used for assembling a semiconductor device.